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data sheet page 1 of the enclosed information is believed to be correct, information may change without notice due to product improvement. users sh ould ensure that the product is suitable for their use. e. & o. e. revision a 20 / 02 / 2007 sales: 01206 751166 technical: 01206 835555 fax: 01206 751188 sales@rapidelec.co.uk tech@rapidelec.co.uk www.rapidonline.com order code order code order code order code manufacturer code manufacturer code manufacturer code manufacturer code description description description description 90-0362 Q42724211000200 rtc-72421b real time clock dil18 rc 27 www.datasheet.co.kr datasheet pdf - http://www..net/
rm0007-e01 application manua l real time clock module rtc-72421/3 model product number 72421 q42724211 xxxx00 72423 q42724231 xxxx00 www.datasheet.co.kr datasheet pdf - http://www..net/
notice ? the material is subject to change without notice. ? any part of this material may not be reproduced or duplicated in any form or any means without the written permission of epson toyocom. ? the information, applied circuit, program, usage etc., written in this material is just for reference. epson toyocom does not assume any liability for the occurrence of infringing any patent or copyright of a third party. this material does not authorize the licensing for any patent or intellectual copyrights. ? any product described in this material may contain technology or the subject relating to strategic products under the control of the foreign exchange and foreign trade law of japan and may require an export licence from the ministry of international trade and industry or other approval from another government agency. ? you are requested not to use the products (and any technical information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other military purposes. you are also requested that you would not make the products available to any third party who may use the products for such prohibited purposes. ? these products are intended for general use in electronic equipment. when using them in specific applications that require extremely high reliability such as applications stated below, it is required to obtain the permission from epson toyocom in advance. / space equipment (artificial satellites, rockets, etc) / transportation vehicles and related (automobiles, aircraft, trains, vessels, etc) / medical instruments to sustain life / submarine transmitters / power stations and related / fire work equipment and security equipment / traffic control equipment / and others requiring equivalent reliability. ? in this manual for epson tyocom, product code and marking will still remain as previously identified prior to the merger.due to the on going strategy of gradual unification of part numbers, please review product code and marking as they will change during the course of the coming months. we apologize for the inconvenience, but we will eventually have a unified part numbering system for epson toyocom which will be user friendly. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 contents ! overview..............................................................................................1 ! block diagram ......................................................................................1 ! terminal connections...........................................................................2 ! terminal functions ...............................................................................3 ! characteristics .....................................................................................4 1. absolute maximum ratings ....................................................................................... 4 2. recommended operating conditions......................................................................... 4 3. frequency characteristics and current consumption characteristics ......................... 4 4. electrical characteristics ( dc characteristics ) ......................................................... 4 ! switching characteristics (ac characteristics) .....................................5 1. when ale is used .................................................................................................... 5 2. when ale is fixed at v dd ......................................................................................... 6 ! registers .............................................................................................7 1. register table ........................................................................................................... 7 2. notes ....................................................................................................................... .7 3. functions of register bits (overview) ......................................................................... 7 4. setting the fixed-period pulse output mode and fixed-period interrupt mode ............ 8 5. resetting the fixed-period pulse output mode and fixed-period interrupt mode......... 8 ! register description .............................................................................9 1. timing registers ........................................................................................................ 9 2. cd register (control register d)............................................................................... 10 3. ce register (control register e) ............................................................................... 11 4. cf register (control register f)................................................................................ 13 ! using the rtc-72421/rtc-72423.....................................................14 1. power-on procedure (initialization).......................................................................... 14 2. read/write of s1 to w registers .............................................................................. 16 3. write to 30-second adj bit ..................................................................................... 16 4. using the cs 1 pin ................................................................................................... 17 ! power supply circuit example.............................................................17 ! examples of connection to general-purpose microprocessor.............18 ! external dimensions ..........................................................................19 ! marking layout ...................................................................................19 ! reference data ..................................................................................20 ! application notes ...............................................................................21 1. notes on handling................................................................................................... 21 2. notes on packaging................................................................................................ 21 www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 1 etm17e-01 4-bit parallel interface real time clock module rtc - 72421 / 72423 ? built-in crystal unit removes need for adjustment and reduces installation costs ? microprocessor bus compatible ( tww, t rd = 120 ns ) ? use of c-mos ic enables low current consumption ( 5 a max., at v dd = 2.0 v ) ? compatibility with intel cpu bus ? address latch enable (ale) pin compatible with multiplex bus cpus ? time (hours, minutes, seconds) and calendar (year, month, day) counter ? 24-hour/12-hour switchover and automatic leap-year correction functions ? fixed-period interrupt function ? 30-seconds correction (adjustment) function ? stop, start, and reset functions ? battery back-up function ? same mounting conditions as general-purpose smd ics possible (rtc-72423) ? pins and functions compatible with the smc-5242 series ! overview the rtc-72421/rtc-72423 module is a real time clock that can be connected directly to a microprocessor's bus. its built-in crys tal unit enables highly accurate time-keeping with no physical access required for adjustment and, since there is no need to connec t external components, mounting and other costs can be reduced. in addition to its time and calendar functions, the rtc-72421/rtc-72423 enables the use of 30-seconds correction and fixed- period interrupt functions. the rtc-72421/rtc-72423 module is ideally suited for applications requiring timing management, such as personal computers, dedicated word-processors, fax machines, multi-function telephones, and sequencers. ! block diagram osc reset bit stop bit 30sec adj bit counter hold bit busy bit d3 d2 d1 d0 wr rd a3 a2 a1 a0 cs0 ale cs1 s1 s10 mi1 mi10 h1 h10 w d1 d10 mo1 mo10 y1 y10 64 hz 1 second carry 1 minute carry 1 hour carry s1 to cf cd ce cf gate gate latch decoder 24/12 bit rtc-72421/72423 std.p output selector www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 2 etm17e-01 ! terminal connections rtc-72421 rtc-72423 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 10 11 std.p cs 0 a le a 0 a 1 a 2 a 3 rd gnd v dd () v dd ( v dd ) cs 1 d 0 1 2 3 wr d d d 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 13 14 std.p cs 0 ale a 0 a 1 a 2 a 3 rd gnd n.c. n.c. n.c. v dd () n.c. cs 1 d 0 d 1 d 2 d 3 wr v dd () v dd n.c. n.c. the (v dd ) pins are at the same electrical level as v dd . do not connect these pins externally. the n.c. pins are not connected internally. ground them in order to prevent noise. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 3 etm17e-01 ! terminal functions pin no. signal rtc-72421 rtc-72423 input/ou tput function d 0 -d 3 (data bus) 11 ? 14 14 ? 16, 19 bi- direction connect these pines to a bi-directional data bus or cpu data bus. use this bus to read to and write from the internal counter and registers. cs 1 cs 0 rd wr mode of d 0 to d 3 h l l h output mode (read mode) h l h l input mode (write mode) h l l l do not use l h or l high impedance (back-up mode) h h h or l high impedance (rtc not selected) a 0 -a 3 (address bus) 4 ? 7 5, 7, 9, 10 input address input pins used for connection to cpu address, etc. used to select the rtc?s internal counter and registers (address selection). when the rtc is connected to a multiplexed-bus type of cpu, these pines can also be used in combination with the ale described below ale (address latch enable) 3 4 input reads in address data and cs 0 state for internal latching. when the ale is high, the address data and cs 0 state is read into the rtc. when the (through-mode) ale falls, the address data and cs 0 state at that point are held. the held address data and cs 0 status are maintained while the ale is low. a le address data and cs 0 status h l read into the rtc to set address data held in the rtc (latched at the tra iling edge of the ale) if the rtc is connected to a cpu that does not have an ale pin and thus there is no need to use this ale pin, fix it to v dd . wr (write) 10 13 input writes the data on d 0 to d 3 into the register of the address specified by a 0 to a 3, at the leading edge of wr . make sure that rd and wr are never low at the same time. rd (read) 8 11 input output data to d 0 to d 3 from the register at the address specified by a 0 to a 3, while rd is low. make sure that rd and wr are never low at the same time. cs 1 , cs 0 (chip select) 15,2 20,2 input when cs 1 is high and cs 0 is low, the rtc?s chip-select function is valid and read and write are enabled. when the rtc is connected to a multiplexed-bus type of cpu, cs 0 requires the operation of the ale (see the description of the ale). use cs 1 connected to a power voltage detection circuit. when cs 1 is high, the rtc is enabled; when it is low, the rtc is on standby. when cs 1 goes low, the hold and reset bits in the rtc registers are cleared to 0. std.p (standard pulse) 1 1 output this is an n-channel open drain output pin. depending on the setting of the c e register, a fixed-period interrupt signal and a pulse signal are output. the output from this pin cannot be inhibited by the cs 1 and cs 0 signals. use a load voltage that is less than or equal to v dd . if not using this pin, keep it open-circuit. an example of std.p connection is shown below. a t least 2.2 k ? std.p rtc +5 v or v dd if the std.p output is not be used during standby operation, connecting the pull- up resister to +5 v provides a reduction in current consumption. if the std.p output is to be used even during standby, connect the pull-up resistor to the rtc?s v dd . in this case, the current consumption will be increased by the amount of current flowing through the pull-up resistor. v dd 18 24 connect this pin to power source. supply to 5 v 10 % to this pin during normal operation; at least 2 v during battery back-up operation. gnd 9 12 connect this pin to ground. (v dd ) 16, 17 22,23 these pins are connected internally to v dd . leave them open circuit. n.c. ? 3, 6, 8, 17, 18, 21 these pins are not connected internally. ground them. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 4 etm17e-01 ! characteristics 1. absolute maximum ratings item symbol condition specification unit supply voltage v dd ta=+25 c ? 0.3 to 7.0 v input voltage v i ta=+25 c gnd ? 0.3 to v dd +0.3 v output voltage v o ta=+25 c gnd ? 0.3 to v dd +0.3 v rtc-72421 ? 55 to +85 c storage temperature t stg rtc-72423 ? 55 to +125 c 2. recommended operating conditions item symbol condition specification unit supply voltage v dd 4.5 to 5.5 v rtc-72421 ; ? 10 to +70 c operating temperature t opr no condensation rtc-72423 ; ? 40 to +85 c data hold voltage v dh 2.0 to 5.5 v cs 1 data hold time t cdr operation recovery time tr see the section on data hold timing 2.0 min. s 3. frequency characteristics and current consumption characteristics item symbol condition specification unit rtc-72421a 10 rtc-72421b 50 rtc-72423a 20 frequency tolerance ? f/f0 ta=+25 c v dd =5.0 v rtc-72423 50 rtc-72421 : ? 10 c to +70 c (+25 c reference) +10 / ? 120 operation temperature rtc-72423 : ? 40 c to +85 c (+25 c reference) +10 / ? 220 10 -6 frequency voltage characteristics ta=+25 c v dd =2.0 v to 5.5 v 5 max. 10 -6 / v aging fa v dd =5.0 v, ta=+25 c 5 max. 10 -6 / year shock resistance s.r. drop test 3 times on a hard board from 0.75 m height, or 29400 m/s 2 0.2 ms 1/2 sin wave 3 directions 10 max. 10 -6 i dd 1 v dd =5.0 v 1.0 typ. 10 max. current consumption i dd 2 ta=+25 c, cs 1 =0 v i/o currents excluded v dd =2.0 v 0.9 typ. 5 max. a 4. electrical characteristics ( dc characteristics ) item symbol condition applicable pins min. typ. max. unit high input voltage 1 v ih 1 2.2 v low input voltage 1 v il 1 all input pins except for cs 1 0.8 high input voltage 2 v ih 2 4/5v dd low input voltage 2 v il 2 v dd =2.0 v to 5.5 v cs 1 1/5v dd v input leakage current 1 i lk 1 input pins except for d 0 to d 3 1/-1 a input leakage current 2 i lk 2 v i =v dd /0 v 10/-10 low output voltage 1 v ol 1 i ol =2.5 ma 0.4 high output voltage v oh i oh =-400 a d 0 to d 3 2.4 low output voltage 2 v ol 2 i ol =2.5 ma 0.4 v off-state leakage current i offlk v i = v dd / 0 v std.p 10/-10 a input capacitance c i input pins except for d 0 to d 3 10 input-output capacitance c i / o input frequency 1 mhz d 0 to d 3 and std.p 20 pf www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 5 etm17e-01 ! switching characteristics (ac characteristics) 1. when ale is used write mode ( v dd =5 v 0.5 v, rtc-72421;ta= ? 10 c to +70 c, rtc-72423;ta= ? 40 c to +85 c ) item symbol condition min. max. unit cs1 set-up time t su (cs1) 1000 address set-up time before ale t su (a-ale) 50 address hold time after ale th(ale-a) 50 ale pulse width tw(ale) 80 ale set-up time before write t su (ale-w) 0 write pulse width tw(w) 120 ns ale set-up time after write t su (w-ale) 50 data input set-up time before write t su (d-w) 80 data input hold time after write th(w-d) 10 cs1 hold time th(cs1) 1000 write recovery time trec(w) 200 read mode ( v dd =5 v 0.5 v, rtc-72421;ta= ? 10 c to +70 c, rtc-72423;ta= ? 40 c to +85 c ) item symbol condition min. max. unit cs1 set-up time t su (cs1) 1000 address set-up time before ale t su (a-ale) 50 address hold time after ale th(ale-a) 50 ale pulse width tw(ale) 80 ale set-up time before read t su (ale-r) 0 ns ale set-up time after read t su (r-ale) 50 data output transfer time after read t pzv (r-q) c l =150 pf 120 data output floating transfer time after read t pvz (r-q) 0 70 cs1 hold time th(cs1) 1000 read recovery time trec(w) 200 (1) write mode vih2 tsu(cs1) tsu(a-ale) tw(ale) th(ale-a) tsu(ale-w) tw(w) vih1 vil1 vih1 vil1 vih1 vil1 vih1 vih1 vil1 vil1 vih1 vil1 tsu(w-ale) vih1 vil1 vih1 vil1 tsu(d-w) th(w-d) th(cs1) vih2 cs1 a0 to a3 cs0 ale d0 to d3 wr (input) (2) read mode vih2 tsu(cs1) tsu(a-ale) tw(ale) th(ale-a) tsu(ale-r) vih1 vil1 vih1 vil1 vih1 vil1 vih1 vih1 vil1 vil1 vih1 vil1 tsu(r-ale) vih1 vil1 vih1 vil1 tpzv(r-q) ) tpvz(r-q) th(cs1) vih2 cs1 a0 to a3 cs0 ale d0 to d3 rd (input) www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 6 etm17e-01 2. when ale is fixed at v dd write mode ( v dd =5 v 0.5 v, rtc-72421;ta= ? 10 c to +70 c, rtc-72423;ta= ? 40 c to +85 c ) item symbol condition min. max. unit cs1 set-up time t su (cs1) 1000 cs1 hold time th(cs1) 1000 address set-up time before write t su (a-w) 50 address hold time after write th(w-a) 10 ns write pulse width tw(w) 120 data input set-up time before write t su (d-w) 80 data input hold time after write th(w-d) 10 write recovery time trec(w) 200 read mode ( v dd =5 v 0.5 v, rtc-72421;ta= ? 10 c to +70 c, rtc-72423;ta= ? 40 c to +85 c ) item symbol condition min. max. unit cs1 set-up time t su (cs1) 1000 cs1 hold time th(cs1) 1000 address set-up time before read t su (a-r) 50 address hold time after read th(r-a) 10 ns data output transfer time after read tpzv(r-q) c l =150 pf 120 data output floating transfer time after read tpvz(r-q) 0 70 read recovery time trec(r) 200 (1) write mode vih2 tsu(cs1) tsu(a-w) tw(w) vih1 vil1 vih1 vil1 vih1 vil1 vil1 vih1 th(w-a) vih1 vil1 vih1 vil1 tsu(d-w) th(w-d) th(cs1) vih2 cs1 a0 to a3 cs0 d0 to d3 wr (input) (2) read mode vih2 tsu(cs1) tsu(a-r) vih1 vil1 vih1 vil1 vih1 vil1 vil1 vih1 th(r-a) voh vol voh vol tpzv(r-q) tpvz(r-q) th(cs1) vih2 cs1 a0 to a3 cs0 d0 to d3 rd (output) (3) read/write recovery mode vih1 vih1 rd,wr trec(r/w) www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 7 etm17e-01 ! registers 1. register table data address (hex) a3 a2 a1 a0 register name d3 d2 d1 d0 count (bcd) remarks 0 0 0 0 0 s1 s8 s4 s2 s1 0 to 9 1-second di g it re g iste r 1 0 0 0 1 s10 * s40 s20 s10 0 to 5 10-seconds digit register 2 0 0 1 0 mi1 mi8 mi4 mi2 mi1 0 to 9 1-minute digit register 3 0 0 1 1 mi10 * mi40 mi20 mi10 0 to 5 10-minute digit register 4 0 1 0 0 h1 h8 h4 h2 h1 0 to 9 1-hour digit register 5 0 1 0 1 h10 * pm/am h20 h10 0 to1 or 2 10-hours digit register 6 0 1 1 0 d1 d8 d4 d2 d1 0 to 9 1-day digit register 7 0 1 1 1 d10 * * d20 d10 0 to 3 10-days digit register 8 1 0 0 0 mo1 mo8 mo4 mo2 mo1 0 to 9 1-month digit register 9 1 0 0 1 mo10 * * * mo10 0 to 1 10-months digit register a 1 0 1 0 y1 y8 y4 y2 y1 0 to 9 1-year digit register b 1 0 1 1 y10 y80 y40 y20 y10 0 to 9 10-years digit register c 1 1 0 0 w * w4 w2 w1 0 to 6 day-of-the-week register d 1 1 0 1 cd 30s adj irq flag busy hold control register d e 1 1 1 0 ce t1 t0 itrpt/ stnd mask control register e f 1 1 1 1 cf test 24/12 stop reset control register f 2. notes the counts at addresses 0 to c are all positive logic. therefore, a register bit that is 1 appears as a high-level signal on t he data bus. data representation is bcd. do not set an impossible date or time in the rtc. if such a value is set, the effect is unpredictable. when the power is turned on (before the rtc is initialized), the state of all bits is undefined. therefore, write to all regis ters after power-on, to set initial values. for details of the initialization procedure, see "using the rtc-72421/rtc-72423". the test bit of control register f is used by epson for testing. operation cannot be guaranteed if 1 is written to this bit, s o make sure that it is set to 0 during power-on initialization. 3. functions of register bits (overview) bit name function * mark not used. writing to this bit has no effect; reading it always returns 0. seconds to year digit all written bcd code. day-of-the-week digit this is special (base 7) counter that increments each time the day digits are incremented. it counts from 0 to 6. since the val ue in the counter bears no relationship to the day of the week, the user can choose the coding that relates the counter value to the day of the week. the following is just one example of this relationship. count 0 1 2 3 4 5 6 day sunday monday tuesday wednesday thursday friday saturday pm/am the pm/am bit is 1 for p.m. times; 0 for a.m. times. this bit is valid only for 12-hour-clock mode (when the 24/12 bit is 0); i n 24-hour- clock mode (when the 24/12 bit is 1), this bit is always 0. 30-seconds adj writing 1 to this bit executes a 30-seconds correction. irq flag the irq flag bit is set to 1 when an interrupt request is generated in fixed-period interrupt mode. writing 0 to this bit clear s it. note that it is possible to write 1 to this bit, but this will have no effect. in fixed-period pulse output mode, this bit is at 1 while the pulse output is active(while the std.p pin output is low), and is automatically cleared when pulse output ends. writing 0 to this bit while pulse output is active forcibly cancels the pulse out put. busy use the busy bit when accessing data in the s 1 to w registers. this bit is set to 1 during the incrementation cycle of the s 1 to w registers, and is set to 0 otherwise. when the busy bit is 1, access to the s 1 to w registers is inhibited. note that the hold bit must also be used when accessing the s 1 to w registers. the busy bit is always 1 when the hold bit is 0. there is no need to check the busy bit when accessing the control registers (c d , c e and c f ). hold when 1 has been written to the hold bit, the status of the busy bit can be checked. while the hold bit is 1, any incrementation of the digits is held just once. (the incrementation is held only once, even if the hold bit remains at 1 for two or more seconds. ) clear the hold bit to 0 by forcing the cs1 pin low. t1,t0 these bits set the timing for fixed-period pulse output and interrupts (1/64 seconds, 1 second, 1minute or 1 hour). itrpt/stnd the itrpt/stnd bit sets fixed-period pulse output mode and fixed-period interrupt mode. write 1 to this bit to set interrupt(in rpt) mode; when write 0 to it to set pulse output(stnd) mode. mask the mask bit disables fixed-period pulse output and fixed-period interrupts. write 1 to this bit to mask and inhibit these mode s; write 0 to it to enable these modes. test the test bit is used by epson for test purposes. operation cannot be guaranteed if 1 is written to this bit, so make sure that it is set to 0 during power-on initialization. 24/12 the 24/12 bit switches between 24-hour clock and 12-hour clock. write 1 to this bit to set 24-hour mode; write 0 to it to set 1 2-hour mode. when the 24/12 bit is set, both the timer registers and the timer mode must be reset to match. note that the h20 bit of t he h10 register is always in 12-hour-clock mode. stop the stop bit sets an inhibition on clock operation in 8192 hz steps which are divisions of the 1 second signal from the rtc?s internal 32768 hz oscillation source. the clock is inhibited when the stop bit is 1, and released again when it becomes 0. the internal oscillation circuit continues to operate even when the stop bit is 1. reset the reset bit resets the part of the counter that is below one second. write 1 to this bit to reset; 0 to release the reset. the reset bit set to 0 when the cs1 pin goes low. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 8 etm17e-01 4. setting the fixed-period pulse output mode and fixed-period interrupt mode mode mask itrpt/stnd itrpt/stnd std.p pin setting of fixed-period output timing fixed-period pulse output mode 0 0 t1 bit 0 0 1 1 fixed-period interrupt mode 0 1 set to 1 when active set low when active t0 bit 0 1 0 1 fixed-period pulse output inhibited 1 0 or 1 "0" open-circuit output period 1/64 s 1 s 1 min. 1 hour 5. resetting the fixed-period pulse output mode and fixed-period interrupt mode mode irq flag irq flag std.p pin write 0 reset immediately after the write ("1" "0") reset immediately after the write ("l" "open") fixed-period pulse output mode mask=0 itrpt/stnd=0 no write automatically returned by the set period ("1" "0") automatically returned by the set period ("l" "open") write 0 reset immediately after write ("1" "0") reset immediately after the write ("l" "open") fixed-period interrupt mode mask=0 itrpt/stnd=1 no write the interrupt request continues, with no reset. subsequent interrupt are ignored. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 9 etm17e-01 ! register description 1. timing registers (1) s1 to y10 registers these registers are 4-bit, positive logic registers in which the digits of the year, month, day, hour, minute, and second are continuously written in bcd code. for example, when(1, 0, 0, 1) has been written to the bits of the s1 register, the current value in the s1 register is 9. as described previously, data is handled by 4-bit bcd codes. therefore, the s1 to y10 registers consist of units registers and tens registers. when seconds are read, for example, the values in the s1 and s10 registers are both read out to give the total number of seconds. (2) w register the w register is a counter that increments each time the day digits are incremented. it counts from 0 to 6. since the value in the counter bears no relationship to the day of the week, the user can choose the coding that relates the counter value to the day of the week. the following is just one example of this relationship; count 0 1 2 3 4 5 6 day sunday monday tuesday wednesday thursday friday saturday (3) h10 register (pm/am, h20, h10) the h10 register contains a combination of the 10-hours digit bits and the pm/am bit. therefore, the contents of this register will depend on whether the 12-hour clock or 24-hour clock is selected. if the 12-hour clock is selected, the user must bear in mind that this register will contain two types of data: 10-hour data in the h10 bit and a.m./p.m. data in the pm/am bit. the pm/am bit is 0 for a.m. and 1 for p.m. for example, if a value of 48 is obtained from the h10 and h1 registers when the h10, h1, m10, and m1 registers are read, remember that the inclusion of a set pm/am bit (pm/am=1) will make the tens digit appear to be 4. since this bit is 1, the time is p.m. if the value read from the m10 and m1 registers is 00, the actual time should be read as 8:00 p.m. similarly, if the value read from the h10 and h1 registers is 11, the pm/am bit is 0, and so this time is therefore a.m. if the value read from the m10 and m1 registers is 30, this time should be read as 11:30 a.m. when the 12-hour clock is used, the h20 bit should never be 1, but it is nonetheless physically possible to write a 1 in this b it. the user should be careful to write a 0, to avoid unpredictable consequences. note that, if a mistake in the pm/am value is made while in 12-hour-clock mode, the date digits will be half a day out. correct setting is needed. if the 24-hour clock is selected, the pm/am bit will always be 0. for details of how to set 12-hour or 24-hour clock, see the section on the 24/12 bit. setting possible times 12-hour clock 12:00 to 11:59, a.m. and p.m. 24-hour clock 00:00 to 23:59 (4) y1 and y10 registers the y1 and y10 registers can handle the last two digits of the year in the gregorian calendar. leap years are automatically identified, and this affects the handling of the month and day digits for february 29. [ leap years ] in general, a year contains 365 days. however, the earth takes slightly longer than exactly 365 days to rotate around the sun, so we need to set leap years in compensation. a leap year occurs once every four years, in years in the gregorian calendar that are divisible by four. however, a further small correction is necessary in that years that are divisible by 100 are ordinary years, but years that are further divisible by 400 are leap years. the main leap and ordinary years since 1900 and into the future are listed on the right. [ leap years in the rtc-72421/72423 ] to identify leap years, the rtc-72421/rtc-72423 che cks whether or not the year digits are divisible by four. as implied above, 2000 will be a leap year, and so no further correction will be necessary in that case. this process identifies the following years as leap years: 96, (20)00, (20)04, (20)08, (20)12... the turn-of-the-century years for which the rtc-72421/rtc-72423 will require a correction are shown shaded in the table on the right. if japanese-era years are set, accurate leap-year identification will only be possible if the era years that are divisible by four are actually leap years. as it happens, years in the current era, heisei, that are divisible by four are leap years, which means that heisei years can be set in these registers. (5) out-of-range data if an impossible date or time is set, this may cause errors. if such a date is set, the behavior of the device is in general unpredictable, so make sure that impossible data is not set. actual leap years and ordinary years year leap year ordinary year 1900 : 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 : 2100 2200 2300 2400 www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 10 etm17e-01 2. cd register (control register d) (1) hold bit (d0) use the hold bit when accessing the s1 and w registers. for details, see "read/write of s1 to w registers". hold bit function hold bit 0 the busy bit is always 1 (the busy status cannot be checked). 1 the busy status can be checked. when the hold bits is 1 and the busy bit is 0, read and write are enabled. when the hold bit is 1, any incrementation in the count is held within the rtc. the held incrementation is automatically compensated for when the hold bit becomes 0. (second and subsequent incrementations are ignored.) therefore, if the hold bit is at 1 for two or more seconds in succession, the time will be slightly slow (delay). make sure that any access to the s1 to w registers is completed within one second, then clear the hold bit to 0. the status of the busy bit remains as set while the hold bit is at 1. if the hold bit is not cleared temporarily to 0, the busy bit will not indicate any change within the rtc of the busy status. therefore, when checking the status of the busy bit, write 0 to the hold bit each time the busy bit is read, to update the status of the busy bit. if the cs1 pin goes low while the hold bit is 1, the hold bit is automatically cleared to 0. there is no need to use the hold bit when accessing the control registers (c d , c e , and c f ). (2) busy bit (d1) the busy bit indicates whether or not the digits from the seconds digit onward are being incremented, and is used when accessing the s1 to w registers. for details, see "read/write of s1 to w registers". there is no need to check the busy bit when accessing the control registers (cd, ce, and cf). busy bit significance of the busy bit condition remarks 0 access enable the rtc is not counting 1 access disabled hold=1 the count has been incremented in the rtc (190 s max.) 1 busy is always 1 hold=0 the count cannot be checked the status of the busy bit remains as set while the hold bit is at 1. if the hold bit is not cleared temporarily to 0, the busy bit will not indicate any change within the rtc of the busy status. therefore, when checking the status of the busy bit, write 0 to the hold bit each time the busy bit is read, to update the status of the busy bit. the busy bit is a read-only bit, so any attempt to write 1 or 0 to it is ignored. (3) irq flag bit (d2) the irq flag bit is an internal status bit that corresponds to the status of the std.p pin output, to indicate whether or not a n interrupt request has been issued to the cpu. when the std.p pin output is low, the irq flag bit is 1; when the std.p pin output is open-circuit, the irq flag bit is 0. when writing data to the cd register, keep the irq flag bit at 1, except when deliberately writing 0 to it. writing 0 to the ir q flag bit cancels its status if it had become 1 at that instant or just before. i. interrupt processing (interrupt status monitor function) since the irq flag bit indicates that an interrupt request has been generated to the cpu, it is in synchronization with the status of the std.p pin output. in other words, the status of the std.p pin output can be monitored by monitoring the irq flag bit. in fixed-period pulse output mode, the relationship between the irq flag bit and the std.p pin output is as follows: std.p pin output irq flag bit low 1 open(for open-drain output) 0 the timing of the irq flag bit and the std.p pin output in fixed-period pulse output mode is as follows: irq flag bit * std.p pin output 01 0 7.8125 ms approx. 1.95 ms the output levels of the std.p pin are low (down) and open circuit (up). ii. std.p pin output reset function the std.p pin output can be reset after an interrupt is generated by writing 0 to the irq flag bit. the relationships of this operation are shown below. note that writing 1 to this bit is possible, but it has no effect. irq flag bit std.p pin output 1 low 0 open(for open-drain output) www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 11 etm17e-01 irq flag bit *std.p pin output 01 0 1 interrupt generation (in synchronization with count incrementation) writing of 0 irq flag bit. the output levels of the std.p pin are low (down) and open circuit (up). note: if the std.p pin output remains low as set, subsequently generated interrupts are ignored. in order to prevent interrupts from being overlooked, write 0 to the irq flag bit before the next interrupt is generated, to return the std.p pin to high. iii. initial setting of irq flag bit if the fixed-period interrupt mode is not used, set the irq flag bit to 1. if the fixed-period interrupt mode is used, set the irq flag bit to 0. (4) 30-second adj bit (d3) the 30-seconds adj bit provides a 30-seconds correction (by which term is meant a rounding to the nearest whole minute) when 1 is written to it. the 30-seconds correction takes a maximum of 76.3 s to perform, and after the correction the 30- seconds adj bit is automatically returned to 0. this operation also clears the sub-second bits of the internal counter down to the 1/256-seconds counter. during the 30-seconds correction, access to the counter registers at addresses 0 to c is inhibited, so monitor the 30-seconds adj bit to check that this bit has returned to 0, before starting subsequent processing. if no access is made to the rtc for 76.3 s or more after 1 is written to the 30-seconds adj bit, there is no need to check the 30- seconds adj bit again. i. operation of 30-seconds adj bit writing 1 to the 30-seconds adj bit performs a 30-second correction. this 30-seconds correction changes the seconds and minutes digits as shown below. if the minutes digits have been incremented, an upward carry is propagated. status of seconds digits before correction status of seconds digits after correction up to 29 seconds 00 seconds. no carry to the minutes digits. 30 to 59 seconds 0 seconds. carry to the minutes digits. example: the correction caused by the 30-seconds adj bit sets the time within the rtc to 00:00:00 if it was within the range of 00:00:00 to 00:00:29, or to 00:01:00 if it was within the range of 00:00:30 to 00:00:59. ii. access inhibited after 30-seconds correction for 76.3 s after 1 is written to the 30-seconds adj bit, the rtc is engaged in internal processing, so read to and write from the s1 to w registers is inhibited. the 30-seconds adj bit is automatically cleared to 0 at the end of the 76.3 s. 3. ce register (control register e) (1) mask bit (d0) the mask bit controls the std.p pin output. the relationships between the mask bit, itrpt/stnd bit, and std.p pin output are as follows: mask itrpt/stnd std.p pin output 0 0 fixed-period pulse output mode 0 1 fixed-period interrupt mode 1 0 or 1 open the timings of the mask bit, itrpt/stnd bit, and std.p pin output are as follows: 1.fixed-period pulse output mode (itrpt/stnd=0) irq flag bit *std.p pin output timing automatic return nothing is output because the mask bit is at 1 01010 01 0 1 0 mask bit the output levels of the std.p pin are low (down) and open circuit(up). www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 12 etm17e-01 2.fixed-period interrupt mode (itrpt/stnd=1) 1 1 1 0 0 0 0 nothing is output because the mask bit is at 1 interrupt timing reset at the point at which 0 is written to the irf flag bit no interrupts are generated while the mask bit is at 1 *std. p pin irq flag bit mask bit the output levels of the std.p pin are low(down) and open circuit(up). (2) itrpt/stnd bit (d1) the itrpt/stnd bit specifies fixed-period pulse output mode or fixed-period interrupt mode for the fixed-period operating mode. the mode selected by each setting of this bit is as follows: itrpt/stnd operating mode 0 fixed-period pulse output mode 1 fixed-period interrupt mode for details of the timing of fixed-period operation, see the section on the t0 and t1 bits below. (3) t0 (d2), t1 (d3) bits these bits select the timing of fixed-period operation in fixed-period pulse output mode or fixed-period interrupt mode. there is no special counter within the rtc for fixed-period operation; the fixed-period operation is performed at the incrementation of the time (period) specified by the t0 and t1 bits. i. setting t0 and t1 setting these bits specifies the generation timing for fixed-period pulse output or fixed-period interrupts. t1 t0 period(frequency) remarks 0 0 1/64 seconds (64 hz) 0 1 1 second (1 hz) 1 0 1 minute (1/60 hz) 1 1 1 hour (1/3600 hz) in fixed-period pulse output mode, the std.p pin output is low for 7.8125 ms (not that half the 1/64 second period is 7.8125 ms) ii. std.p pin output control the timing of std.p pin output is at the incrementation of the period specified by the t0 and t1 bits. example : std.p pin output when 1 hour is set (conditions: t0=1, t1=1, mask=0) fixed-period pulse output mode a utomatic reset after 7.8125 ms reset by writing 0 to irq flag bit (itrpt/stnd=0) (itrpt/stnd=1) fixed-period interrupt output mode pm 1:00 pm 2:00 std.p pin output std.p pin output iii. frequency of std.p pin output in fixed-period pulse output mode in fixed-period pulse output mode, the timing of output is determined by the frequency of the internal crystal unit. this means that the output can be used to measure any error in the frequency of the crystal unit. note: the 30-seconds correction could generate a carry. if such a carry occurs when the t0 and t1 bits are set to (0, 1) or (1, 1), the std.p pin output could end up low. if the itrpt/stnd bit is 0, this low-level std.p pin output will be held from the time that the part of the counter that is below one second is cleared by the 30-seconds correction until the incrementation of the 1/64-second digit of the internal counter restarts. note that this may be different from the normal case in which the std.p pin output is low for 7.8125 ms. the time of the low-level output of the first std.p pin output after a reset or stop operation, or after 1 has been written to the irq flag bit, may not be 7.8125 ms. if any one of the t0, t1, or itrpt/stnd bits is overwritten, the irq flag bit may become 1. therefore, after writing to any of these bits, it is necessary to first write 0 to the irq flag bit then wait until the irq flag bit changes back to 1. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 13 etm17e-01 4. cf register (control register f) (1) reset bit (d0) writing 1 to the reset bit clears the sub-second bits of the internal counter down to the 1/256-seconds counter. the reset continues for as long as the reset bit is 1. end the reset by writing 0 to the reset bit. if the level of the cs 1 pin goes low, the reset bit is automatically cleared to 0. (2) stop bit (d1) writing 1 to the stop bit stops the clock of the internal counter from the 1/8192 second bit onward. writing 0 to the stop bit restarts the clock. this function can be used to create a cumulative timer. (3) 24/12 bit (d2) set the 24/12 bit to select either 12-hour clock or 24-hour clock as the timer mode. in 12-hour clock mode, the pm/am bit is used. i. switching between 12-hour clock and 24-hour clock writing 1 to the 24/12 bit selects 24-hour clock mode. in 24-hour clock mode, the pm/am bit is inoperative and is always 0. writing 0 to the 24/12 bit selects 12-hour clock mode. in 12-hour clock mode, the pm/am bit becomes valid. it is 0 for a.m. times and 1 for p.m. times. ii. overwriting the 24/12 bit overwriting the contents of the 24/12 bit could destroy the contents of the registers from the h1 register upward (from the 1-hour digit upward). therefore, before overwriting the 24/12 bit, it is necessary to save the contents of the hour (h1, h10), day (d1, d10), month (mo1, mo10), year (y1, y10), and day-of-the-week (w) registers, then re-write the data back into the registers to suit the new timer mode, after overwriting the 24/12 bit. (4) test bit (d3) the test bit is used by epson for test purposes. operation cannot be guaranteed if 1 is written to this bit, so make sure that it is set to 0 during power-on initialization. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 14 etm17e-01 ! using the rtc-72421/rtc-72423 1. power-on procedure (initialization) when power is turned on, the contents of all registers and the output from the std.p pin are undefined. therefore, all the regi sters must be initialized after power on. follow the procedure given below for initialization. power on start the counter initialize the control registers to next process check the status of the busy bit stop and reset the counter set the current time in the registers (initialize the s 1 to w registers) start the counter and release the hold status (a) (b) (c) (a) at ths point, there is no need to check the busy bit. from here on, check the status of the busy bit before accessing any of the registers, except for the c d , c e and c f control register. for details of processes (a) to (c), see next page. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 15 etm17e-01 (a)starting the count start set the c f register reg.f test 24/12 stop reset reg.d 30 s adj irq flag hold to next process 0 0 0 0 or 1 0*00b this setting is not necessary when the std.p pin is not used 0 0 0 or 1 0*00b set the irq flag bit to 0 when fixed-period interrupt mode is used, or to 1when it is not used. set the c e register set the c d register (b) checking the status of the busy bit start to next process hold bit 1 read the busy bit busy bit=0? no yes hold bit 0 (c)stopping and resetting the counter start to next process set the c f register reg.f test 24/12 stop reset 1 1 0 0 or 1 0*11b www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 16 etm17e-01 2. read/write of s1 to w registers use one of the procedures shown below to access registers other than the control registers (cd, ce, and cf) while the rtc is operating. note that the control registers can be accessed regardless of the status of the busy bit. read or write when the hold bit is used from previous process to next process read the busy bit busy bit = 0? wait 190 s no yes read required digit data or set the time hold bit 1 hold bit 0 hold bit 0 or from previous process to next process read the busy bit busy bit = 0? no yes read requierd digit data or set the time hold bit 1 hold bit 0 hold bit 0 read when the hold bit is not used from previous process to next process store the read data (a data) a=b? no yes read the required digit data (1st time) read the required digit data (2nd time) store the read data (b data) the operation when the hold bit is not used involves reading the same digit twice and comparing the read values. this is to avoid the problem of reading unstable data that would occur if the data was read while the rtc was incrementing the count. 3. write to 30-second adj bit the 30-seconds adj function is enabled by writing 1 to the 30-seconds adj bit. note that the counter registers (s1 to w) cannot be accessed for 76.3 s after this write. therefore, follow one of the procedures shown below to use this function. start end 30 s adj bit 1 read the 30 s adj bit wait 76.3 s no yes 30 s adj bit=0? or start end 30 s adj bit 1 read the 30 s adj bit no yes 30 s adj bit=0? note the crystal unit could be damaged if subjected to excessive shock. if the crystal unit should stop operating for such a reason, the timer within the rtc will stop. while the crystal unit is operating, the busy bit is automatically reset every 190 s and the 30- seconds adj bit, every 76.3 s , but this automatic reset cannot be done if the oscillation stops. therefore, in such a status, it is no longer possible to escape from the busy bit status check loop shown in subsection 2 above or the 30-seconds adj bit status chec k loop shown in subsection 3 above, and you should consider backing up the system. to design a fail-safe system, provide an escap e from the loop to a procedure that can process such an error if the loop is repeated for more than 0.5 ms to 1.0 ms. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 17 etm17e-01 4. using the cs 1 pin the rtc-72421/rtc-72423 has 2 chip-select signal systems: cs 0 and cs1. use cs 0 as chip-select for ordinary bus access. cs 1 is not only used for cpu bus control, it also has the main function of switching between standby mode and operating mode. (1) functions providing the cs 1 pin with the rated voltage levels enables cs 1 to have the following functions: ? enabling interface with microprocessor during operation within the operating voltage range (5.0 v 0.5 v) ? reducing current consumption during standby (to prevent through currents caused by unstable inputs, which is inherent to c-mos devices) ? protecting internal data during standby to ensure these functions, make sure that operation of the cs 1 pins observes that following conditions: ? make sure that the voltage input to the cs 1 pin during operation is at least 4/5 v dd . ? make sure that the voltage input to the cs 1 pin during standby is as close as possible to 0 v, to prevent through currents. ? make sure that the operation conforms to the timing chart below during a shift to standby mode or a return to operating mode. * standby mode is a state in which a voltage lower than the rtc's rated range of operating supply voltage is applied (4.5 v to 2.0 v). under this condition, the timer continues to operate under battery back-up power, but the interface between the interior and exterior of the rtc cannot be guaranteed. (2) timing data hold mode v ih2 (4/5 v dd ) v il2 (1/5 v dd ) t cdr 2 s min. t r 4 v4 v shift to standby mode return to operation mode must be at least 2.0 v must be at no more than 1/5 v dd 2 s min. do not access the rtc while the voltage at cs1 is changing. (3) note if the rtc is operated with timing conditions different from those shown above, data within the rtc could be overwritten during a shift to standby mode or a return to operating mode. for example, if a write signal (wr) is generated during either of the timing conditions (tcdr, tr) shown in the timing chart above, the data will be input before the rtc has stabilized. to ensure that data is held throughout the entire standby process, make sure that the timing conditions shown in the chart are followed. ! power supply circuit example voltage detection circuit rtc v dd cs1 gnd ceramic capacitor of 0.01 f to 0.1 f +5 v note1 note2 + note 1:this capacitor must be of a high capacity because a transient reverse current flows from the collector to the emitter of the transistor when the power is turned off. note 2:use a chargeable or lithium battery. if a chargeable battery is used, there is no need for the diode. if a lithium batte ry is used, the diode is necessary. for specific details of the resistance of the resistor, contact the manufacturer of the battery t hat is used. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 18 etm17e-01 ! examples of connection to general-purpose microprocessor when connecting the rtc-72421/rtc-72423 to a microprocessor, carefully check the ac timings of both the rtc and the microprocessor. 1. connection to multiplexed bus type ad3 ad2 ad1 ad0 io/m ale rd wr decoder a3 a2 a1 a0 d3 d2 d1 d0 cs0 ale rd wr 8085/mcs48,51 rtc-72421/3 upper address bus ad3 ad2 ad1 ad0 upper address bus io/m ale rd wr decoder a3 a2 a1 a0 d3 d2 d1 d0 cs0 ale rd wr 8085/mcs48,51 rtc-72421/3 latch the resistors on the rd and wr lines are not necessary if the cpu does not have a halt or hold state. 2. connection to z80 or compatible cpu a3 a2 a1 a0 upper address bus rd wr decoder a3 a2 a1 a0 d3 d2 d1 d0 cs0 ale rd wr z80, smc84c00ac rtc-72421/3 d3 d2 d1 d0 iorq memrq or *select iorq or memrq depending on whether the rtc maps i/o or memory of the cpu. 3. connection to 68-series mpu a3 a2 a1 a0 upper address bus r/w e decoder a3 a2 a1 a0 d3 d2 d1 d0 cs0 ale rd wr 68 series mpu rtc-72421/3 d3 d2 d1 d0 www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 19 etm17e-01 ! external dimensions 1. rtc-72421 23.1 max. 6.3 4.2 max. 2.54 min. 0.2 min. 2.54 0.46 7.62 0 - 15 0.25 1.52 2. rtc-72423 min. 16.3 max. 7.9 0.35 1.27 0.1 2.8 max. 1.0 12.0 0.2 0 - 10 unless otherwise stated, all units are [mm] ! marking layout rtc72421 epson a 6053c type frequency tlerance manufacturing lot no. indications of frequency tolerance type tolerances rtc-72421 rtc-72423 a b a no indications indication logo mark 50 x10 -6 10 x10 -6 50 x10 -6 20 x10 -6 note: the illustration is a general representation of the content and location of information on the label, and is not a detailed specification of the typeface, size or positioning of printing used on the label. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 20 etm17e-01 ! reference data [finding the frequency stability] 1. frequency and temperature characteristics can be approximated using the following equations. ? ft = ( t - x ) 2 ? ft : frequency deviation in any temperature ( 1 / c 2 ) : coefficient of secondary temperature ( ? 0.035 0.005 ) 10 -6 / c 2 t ( c ) : ultimate temperature (+25 5 c) x ( c ) : any temperature 2. to determine overall clock accuracy, add the frequency precision and voltage characteristics. ? f/f = ? f/fo + ? ft + ? fv ? f/f : clock accuracy (stable frequency) in any temperature and voltage. ? f/fo : frequency precision ? ft : frequency deviation in any temperature. ? fv : frequency deviation in any voltage. 3. how to find the date difference date difference = ? f/f 86400(s) * for example: ? f/f = 11.574 10 -6 is an error of approximately 1 second/day. 1. example of frequency and temperature characteristics -150 -100 -50 0 -50 0 +50 +100 temperature [ c] frequency ? f t 10 -6 t = +25 c typ. = -0.035 10 -6 typ. 2. frequency voltage characteristics ( typ. ) frequency[x10 - 6 ] -4 -2 0 +2 +4 6 2 3 4 5 supply voltage(v dd ) [v] condtions 5 v reference,ta=+25 c 3. current consumption voltage characteristics ( typ. ) current consumption[ a] 1 2 3 4 5 6 2345 supply voltage(v dd ) conditions cs1=0 v, no load, ta=+25 c note: this data shows average values for a sample lot. for rated values, see the specifications. www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 21 etm17e-01 ! application notes 1. notes on handling this module uses a c-mos ic to realize low power consumption. carefully note the following cautions when handling. (1) static electricity while this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity. containers used for packing and transport should be constructed of conductive materials. in addition, only soldering irons, measurement circuits, and other such devices which do not leak high voltage should be used with this module, which should also be grounded when such devices are being used. (2) noise if a signal with excessive external noise is applied to the power supply or input pins, the device may malfunction or "latch up." in order to ensure stable operation, connect a filter capacitor (preferably ceramic) of greater that 0.1 f as close as possible to the power supply pins ( between v dd and gnd ). also, avoid placing any device that generates high level of electronic noise near this module. ? do not connect signal lines to the shaded area in the figure shown in fig.1 and, if possible, embed this area in a gnd land. (3) voltage levels of input pins apply signal levels that are as close as possible to v dd and ground, to all pins except the cs1 pin. mid-level potentials will cause increased current consumption and a reduced noise margin, and can impair the functioning of the device. since it is likely that power consumption will increase excessively and operation cannot be guaranteed, the setting of the voltage range of v ih2 and v il2 at the cs1 pin should be such that the system is designed so that it is not affected by ripple or other noise. note that the cs1 pin cannot handle a ttl interface. (4) handling of unused pins since the input impedance of the signal pins is extremely high, operating the device with these pins open circuit can lead to malfunctions due to noise. pull-up or pull-down resistors should be provided for all unused signal pins. the n.c. pins should be connected to either v dd or gnd, to prevent noise. if not using the ale pin, connect it directly to v dd . 2. notes on packaging (1) soldering temperature conditions if the temperature within the package exceeds +260 c, the characteristics of the crystal oscillator will be degraded and it may be damaged. therefore, always check the mounting temperature before mounting this device. also, check again if the mounting conditions are later changed. ? see fig.2 for the soldering conditions of smd products. (2) mounting equipment while this module can be used with general-purpose mounting equipment, the internal crystal oscillator may be damaged in some circumstances, depending on the equipment and conditions. therefore, be sure to check this. in addition, if the mounting conditions are later changed, the same check should be performed again. (3) ultrasonic cleaning depending on the usage conditions, there is a possibility that the crystal oscillator will be damaged by resonance during ultrasonic cleaning. since the conditions under which ultrasonic cleaning is carried out (the type of cleaner, power level, time, state of the inside of the cleaning vessel, etc.) vary widely, this device is not warranted against damage during ultrasonic cleaning. (4) mounting orientation this device can be damaged if it is mounted in the wrong orientation. always confirm the orientation of the device before mounting. (5) leakage between pins leakage between pins may occur if the power is turned on while the device has condensation or dirt on it. make sure the device is dry and clean before supplying power to it. fig. 1 : example gnd pattern fig. 2 : reference profile for our evaluation of soldering heat resistance. ( smd products ) rtc-72421 rtc-72423 +1 +5 c/ s 100 s pre-heating area ? 1 ? 5 c / s time [ s ] temperature [ c ] +170 c +220 c +260 c max. +1 +5 c / s 35 s stable melting area www.datasheet.co.kr datasheet pdf - http://www..net/
rtc - 72421 / 72423 page ? 22 etm17e-01 www.datasheet.co.kr datasheet pdf - http://www..net/
? ? ? ? application manual qd sales engineering group electronic devices information on www server america epson electronics america, inc. headquarter 150 river oaks parkway, san jose, ca 95134, u.s.a. phone: (1)800-228-3964 (toll free) : (1)408-922-0200 (main) fax: (1)408-922-0238 http://www.eea.epson.com atlanta office one crown center 1895 phoenix blvd. suite 348 atlanta, ga 30349 phone: (1)800-228-3964 (toll free) : (1)770-907-7667 (main) boston office 301edgewater place, ste. 120, wakefield, ma 01880, u.s.a. phone: (1)800-922-7667 (toll free) : (1)781-246-3600 (main) fax: (1)781-246-5443 chicago office 101 virginia st., ste. 290, crystal lake, il 60014, u.s.a. phone: (1)800-853-3588 (toll free) : (1)815-455-7630 (main) fax: (1)815-455-7633 el segundo office 1960 e. grand ave., 2nd floor, el segundo, ca 90245, u.s.a. phone: (1)800-249-7730 (toll free) : (1)310-955-5300 (main) fax: (1)310-955-5400 toyocom u.s.a. ,inc. 617 east golf road,suite 112,arlington heights,il60005,u.s.a. phone: (1)847-593-8780 fax: (1)847-593-5678 europe epson europe electronics gmbh headquarter riesstrasse 15, 80992 munich, germany phone: (49)-(0)89-14005-0 fax: (49)-(0)89-14005-110 http://www.epson-electronics.de dsseldorf branch office altstadtstrasse 176, 51379 leverkusen, germany phone: (49)-(0)2171-5045-0 fax: (49)-(0)2171-5045-10 uk & ireland branch office unit 2.4, doncastle house, doncastle road, bracknell, berkshire rg12 8pe, england phone: (44)-(0)1344-381700 fax: (44)-(0)1344-381701 french branch office lp 915 les conqurants, 1 avenue de l' atlantique, z.a. de courtaboeuf 2 91976 les ulis cedex, france phone: (33)-(0)1-64862350 fax: (33)-(0)1-64862355 toyocom europe gmbh headquarter bollenhoehe 5,40822 mettmann,germany phone: (49)2104-91890 fax: (49)2104-918930 uk office unit 4, e-space south 26 st thomas?place ely, cambridgeshir cb7 4ex , england phone: (44)-(0)1353-644060 fax: (44)-(0)8704-583822 asia epson (china) co., ltd. 23f, beijing silver tower 2# north rd dongsanghuan chaoyang district, beijing, china phone: (86) 10-6410-6655 fax: (86) 10-6410-7319 http://www.epson.com.cn shinghai branch high-tech building,900 yishan road shanghai 200233,china phone: (86) 21-5423-5577 fax: (86) 21-5423-4677 epson hong kong ltd. 20/f., harbour centre, 25 harbour road, wanchai, hong kong phone: (852) 2585-4600 fax: (852) 2827-2152 http://www.epson.com.hk epson electronic technology development (shenzhen )co., ltd. 12/f, dawning mansion,#12 keji south road, hi-tech park, shenzhen, china phone: (86) 755-26993828 fax: (86) 755-26993838 epson taiwan technology & trading ltd. 14f, no.7, song ren road, taipei 110 phone: (886) 2-8786-6688 fax: (886)2-8786-6660 http://www.epson.com.tw epson singapore pte. ltd. no 1 harbourfront place, #03-02 harbourfront tower one, singapore 098633. tel: (65)- 6-586-5500 fax: (65) 6-271-3182 http://www.epson.com.sg seiko epson corporation korea office 50f, kli 63 building,60 yoido-dong, youngdeungpo-ku, seoul, 150-763, korea phone: (82) 2-784-6027 fax: (82) 2-767-3677 http://www.epson-device.co.kr gumi branch office 2f, grand bldg,457-4, songjeong-dong gumi-city, gyongsangbuk-do, 730-090, korea phone: (82) 54-454-6027 fax: (82) 54-454-6093 toyocom asia pte.ltd. no.1 tannery road,#05-03,cencon i,singapore 347719 phone: (65)6841-6311 fax: (65)6841-2886 toyocom hong kong ltd. unit 11&12,8/f,millennium city,378 kwun tong road,kwun tong, kowloon,hong kong phone: (852)2409-9033 fax: (852)2409-9130 toyocom shanghai co.,ltd. high-tech building,900 yishan road shanghai 200233,china phone: (86) 21-5423-4000 http://www.epsontoyocom.co.jp di st ri butor www.datasheet.co.kr datasheet pdf - http://www..net/

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